Cadence Advances Hyperscale SoC Design With Expanded IP Portfolio For TSMC N3E Process Featuring 224G-LR SerDes IP
Portfolio Pulse from Benzinga Newsdesk
Cadence Design Systems (CDNS) has expanded its IP portfolio for the TSMC N3E process, featuring 224G-LR SerDes IP. The company has achieved significant gains in performance and power efficiency, with the 224G-LR SerDes PHY IP achieving first-pass silicon success. Multiple Cadence IP test chips have successfully taped out on the TSMC N3E process, including PCIe 6.0 and 5.0, 64G-LR Multi-Protocol PHY, LPDDR5x/5, GDDR7/6 and UCIe.
September 20, 2023 | 2:47 pm
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Cadence's expanded IP portfolio for the TSMC N3E process could lead to increased demand for its products, potentially boosting its stock price.
The expansion of Cadence's IP portfolio for the TSMC N3E process, along with the successful first-pass silicon success of the 224G-LR SerDes PHY IP, indicates a positive development for the company. This could lead to increased demand for its products, which could potentially boost its stock price in the short term.
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